1. Field of the Invention
The present invention relates to a lead pin for package boards.
2. Description of the Related Art
Recently, a PGA (Pin Grid Array)-type semiconductor package board has been widely used for connecting a package board to a main board, the package board having an IC connected thereto. In the PGA-type semiconductor package board, a lead pin is bonded to a pad portion of the package board through solder.
FIGS. 1 and 2 are process diagrams showing a state where a general package board and a lead pin are bonded to each other.
Referring to FIGS. 1 and 2, solder paste 12 obtained by mixing solder and flux is applied on a pad portion 11 of a package board 10, and a lead pin 13 is mounted on the pad portion 11 of the package board 10.
In this case, however, when the lead pin 13 is mounted, buoyancy may occur because an amount and state of the solder paste 12 applied on the pad portion 11 of the package board 10 is not uniform. Then, the position of the lead pin 13 may deviate, thereby degrading the bonding strength between the package board 10 and the lead pin 13.
Next, the lead pin 13 mounted on the pad portion 11 of the package board 10 is bonded to the package board 10 through a reflow process.
The lead pin 13 is bonded to the pad portion 11 of the package board 10 by using solder having a higher melting point than solder used for bonding IC chips.
In this case, however, the melting time of the solder should be maintained for a short period of time, in order to minimize thermal shock applied to the package board 10. Then, a void may occur in the solder, because the time is not enough for the void to escape.
The void formed in such a manner may deteriorate the lead pin 13 while being heated during the mounting of the IC chips, even through the void does not causes defects during the bonding of the lead pin 13.